Domain Speci c Mapping for Solving GraphProblems on Recon gurable Devices ?

Conventional mapping approaches to Reconngurable Computing (RC) utilize CAD tools to perform the technology mapping of a high-level design. In comparison with the execution time on the hardware , extensive amount of time is spent for compilation by the CAD tools. However, the long compilation time is not always considered when evaluating the time performance of RC solutions. In this paper, we propose a domain speciic mapping approach for solving graph problems. The key idea is to alleviate the intervention of the CAD tools at mapping time. High-level designs are synthesized with respect to the speciic domain and are adapted to the input graph instance at run-time. The domain is deened by the algorithm and the reconngurable target. The proposed approach leads to predictable RC solutions with superior time performance. The time performance metric includes both the mapping time and the execution time. For example, in the case of the single-source shortest path problem, the estimated run-time speed-up is 10 6 compared with the state-of-the-art. In comparison with software implementations, the estimated run-time speed-up is asymptotically 3:75 and can be improved by further optimization of the hardware design or improvement of the connguration time.